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SE: Subsystem Verification

Page history last edited by barbara gibson 14 years, 12 months ago

Return to Understanding Systems Engineering

Previous: Unit / Device Testing

Next: System Verification and Deployment

  

Subsystem Verification Step Description

Once components are verified and integrated into subsystems, these higher level assemblies are also individually verified before being integrated with others to produce yet larger assemblies, until the complete system has been integrated and verified.

 

 

Purpose

The purpose of this step is to verify that each subsystem meets the requirements defined for it (in the high level design step of the process).  

 

Activities

The following key activities are performed. 

 

  1. Develop Subsystem Verification Procedures.  If a subsystem verification plan was developed (in the earlier High Level Design step), then detailed procedures must be written to perform the subsystem verifications.  These procedures define the exact steps that will be undertaken to verify each requirement assigned to the subsystem.
  2. Integrate components into subsystems.  Components are integrated into subsystems (from a hardware viewpoint) or modules are combined into applications (from a software viewpoint).
  3. Perform Subsystem Verification.  The subsystem requirements are verified using the Subsystem Verification procedures defined above. 

 Related Resources

Chapter 4.7 Integration and Verification Systems Engineering for Intelligent Transportation Systems, January 2007

http://ops.fhwa.dot.gov/publications/seitsguide/section4.htm#s4.7

Cost: Free

 

Chapter 9: Integration & Test Phase - Systems Development Life Cycle Guidance Document, Department of Justice, January 2003

http://www.usdoj.gov/jmd/irm/lifecycle/ch9.htm

Cost: Free

 

System Test Plan Template – Appendix J, Florida's Statewide Systems Engineering Management Plan, Version 2, Florida Department of Transportation, March 2005

http://www.floridaits.com/SEMP/Files/PDF_Report/ApxJ.pdf

Cost: Free

 

Test Procedures Template – Appendix K, Florida's Statewide Systems Engineering Management Plan, Version 2, Florida Department of Transportation, March 2005

http://www.floridaits.com/SEMP/Files/PDF_Report/ApxK.pdf

Cost: Free

 

System Test Report Template – Appendix L, Florida's Statewide Systems Engineering Management Plan, Version 2, Florida Department of Transportation, March 2005

http://www.floridaits.com/SEMP/Files/PDF_Report/ApxL.pdf

Cost: Free

 

Security Engineering Plan Template – Appendix S, Florida's Statewide Systems Engineering Management Plan, Version 2, Florida Department of Transportation, March 2005

http://www.floridaits.com/SEMP/Files/PDF_Report/ApxS.pdf

Cost: Free

 

Verification: Sub-system and System Level Verification

Systems Engineering Guidebook for ITS, California Department of Transportation Division of Research and Innovation, January 2007

http://www.fhwa.dot.gov/cadiv/segb/views/document/Sections/Section3/3_6_3.htm

Cost: Free

 

 

Note:  Much of the material on this page was extracted from  http://www.itslessons.its.dot.gov/its/benecost.nsf/LessonSystemsEng.  

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